Analysis of Dimensionality Reduction Techniques on Big Data

Due to digitization, a huge volume of data is being generated across several sectors such as healthcare, production, sales, IoT devices, Web, organizations. Machine learning algorithms are used to uncover patterns among the attributes of this data. Hence, they can be used to make predictions that can be used by medical practitioners and people at managerial level to make executive decisions. Not all the attributes in the datasets generated are important for training the machine learning algorithms. Some attributes might be irrelevant and some might not affect the outcome of the prediction. Ignoring or removing these irrelevant or less important attributes reduces the burden on machine learning algorithms. In this work two of the prominent dimensionality reduction techniques, Linear Discriminant Analysis (LDA) and Principal Component Analysis (PCA) are investigated on four popular Machine Learning (ML) algorithms, Decision Tree Induction, Support Vector Machine (SVM), Naive Bayes Classifier and Random Forest Classifier using publicly available Cardiotocography (CTG) dataset from University of California and Irvine Machine Learning Repository. The experimentation results prove that PCA outperforms LDA in all the measures. Also, the performance of the classifiers, Decision Tree, Random Forest examined is not affected much by using PCA and LDA.To further analyze the performance of PCA and LDA the eperimentation is carried out on Diabetic Retinopathy (DR) and Intrusion Detection System (IDS) datasets. Experimentation results prove that ML algorithms with PCA produce better results when dimensionality of the datasets is high. When dimensionality of datasets is low it is observed that the ML algorithms without dimensionality reduction yields better results

Load Balancing of Energy Cloud using Wind Driven and Firefly Algorithms in Internet of Everything

The smart applications dominating the planet in the present day and age, have innovatively progressed to deploy Internet of Things (IoT) based systems and related infrastructures in all spectrums of life. Since, variety of applications are being developed using this IoT paradigm, there is an immense necessity for storing data, processing them to get meaningful information and render suitable services to the end-users. The “thing” in this decade is not only a smart sensor or a device; it can be any physical or household object, a smart device or a mobile. With the ever increasing rise in population and smart device usage in every sphere of life, when all of such “thing”s generates data, there is a chance of huge data traffic in the internet. This could be handled only by integrating “Internet of Everything (IoE)” paradigm with a completely diversified technology - Cloud Computing. In order to handle this heavy flow of data traffic and process the same to generate meaningful information, various services in the global environment are utilized. Hence the primary focus revolves in integrating these two diversified paradigm shifts to develop intelligent information processing systems. Energy Efficient Cloud Based Internet of Everything (EECloudIoE) architecture is proposed in this study, which acts as an initial step in integrating these two wide areas thereby providing valuable services to the end users. The utilization of energy is optimized by clustering the various IoT network using Wind Driven Optimization Algorithm. Next, an optimized Cluster Head (CH) is chosen for each cluster, using Firefly Algorithm resulting in reduced data traffic in comparison to other non-clustering schemes. The proposed clustering of IoE is further compared with the widely used state of the art techniques like Artificial Bee Colony (ABC) algorithm, Genetic Algorithm (GA) and Adaptive Gravitational Search algorithm (AGSA). The results justify the superiority of the proposed methodology outperforming the existing approaches with an increased -life-time and reduction in traffic

Xilinx Virtex II Pro implementation of a reconfigurable UMTS digital channel filter

A reconfigurable digital root raised cosine (RRC) filter for a UMTS terrestrial radio access (UTRA) mobile terminal receiver is implemented on a Xilinx Vitrex II Pro Field Programmable Gate Array (FPGA). The filter employs a finite impulse response (FIR) and monitors in-band and out-of-band received signal powers and calculates the appropriate filter length that meets the bit-energy to interference ratio (Eb/No) of the system. The results presented are for the time division duplex (TDD) mode of UTRA